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On-Chip-Debug using - BDM - JTAG & SWD
How does On-Chip- Debugging work ?
The following is a simplification to help new users with the concepts..........
Each and every chip of a family ( eg ARM or Freescale ColdFire ) allocates a few pins to communicate between a special Control Module within the microprocessor chip and an application program normally running on a PC. To minimise the number of pins and circuitry used on the chip this communication typically employs a non standard communications link so we need a specialist interface at the PC end.
When the micro powers up it examines some of these pins and if set in a particular way the Control Module takes over and the micro is said to have started in On-Chip-Debug mode (we will use the abbreviation BDM short for Background Debug Mode interchangeably). If not set for BDM the Control Module simply starts the micro running at the power up location and has no more to do --- the pins being assigned to their standard I/O functions.
If set for BDM then the Control Module not the CPU decides what will happen next. The Control Module has access to all the memory busses and once in BDM mode it can, for example, read and write all the memory and registers and send their contents to the PC for the engineer to look at. The engineer may decide to send fresh code from the PC to be loaded into the targets RAM. The Control Module can also force the microprocessor to execute a single instruction, or to run until the microprocessor hits a predefined location whose address corresponds to the contents of the Control Modules "breakpoint registers". With just these few functions the engineer operating the PC has all the facilities needed to control the target system and debug code on the Microcontroller.
In short BDM provides 90% of the functionality of an In Circuit Emulator (ICE) at <1% of the cost.
N.B. when JTAG is used to control On-Chip debugging it uses the signal standards specified by the Joint Test Action Group (JTAG the common name for the IEEE 1149.1) for communications but this does not automatically imply that the chip can be tested via boundary scan techniques and tools.
Using BDM to program Flash ?
The secret is that the BDM interface is used to load a small application into RAM plus as much of the data to be loaded into the flash as will fit in the remainder of the RAM. The BDM then starts that application which "burns" the flash and then goes back to the PC for more data until the task is finished.
The following describe P & E's range of BDM & JTAG products
P&E are leaders in this field and their products are included in many Freescale EVB packages. P & E's tools, including interfaces, software such as programmers (PROG), in-circuit debuggers (ICD), assembler/editors and register file displays (REGxx) all available off the shelf. They work via P & E's interfaces, which connect the PC to the target's, header by USB or Ethernet. These products are available as full 32/64 bit windows app for W95/98/2K/NT/XP/W7 and W8 for the following target processor families:
P&Es latest USB Universal Cables are the hardware interfaces between a standard PC and the header on any of a wide range of target system. Depending on the chip they provide access to the Background Debug Mode (BDM), JTAG and SWD interfaces of the microcontroller. By employing the BDM/JTAG/SWD Cable the user can take advantage of "On-Chip-Debugging" to program internal or external FLASH memory devices and to test the application code in the micro.
A range of price performance points are available with the low cost Universal, the high performance Universal FX and the production Cyclone as alternatives.
Flash memory programming tools are available both for the development and production environments. See below for details of how they work.
Using the Universal FX Synchronous target architectures such as the Kinetis, Qorivva, Coldfire V2-V4, 683xx, HC16, Power Architecture PX Series and the DSC the communications can run at 4 to 10 times faster than the older Multilink interfaces.
These boxes will connect a PC via Serial, USB or Ethernet to provide a super fast interactive Flash programmer under manual or automatic control. They can even be disconnected from the PC and used as a standalone Flash programmer. If you are developing applications for any of the Freescale devices they are the only CPU specific hardware development tool you will ever need to buy. They will work with all the software packages shown below:
Pro For use with 68HC08, HCS08, HC12, HCS12
families. Interfaces to P&E, CodeWarrior and Cosmic debug
These will program the following devices
Cortex devices For programming ARM Cortex M0-4
based devices from STMicro, NXP, TI Stellaris and Freescale Kinetis.
The Cyclones are provided with a full set of flash programming algorithms and are particularly popular in production environments where they can be used with a range of automation options designed for full scale production line programming.
An interactive flash EEPROM programming software package that allows you to program/reprogram both internal and external flash devices in-circuit, via a P&E interface cable. Perfect for development, production line programming, or field firmware upgrades. P&Es products contains our entire library of setup files for a particular processor, and includes both interactive and command-line versions for use in development and production.
To see which Flash devices P&E support follow this link .
Flash memory functions are :
P&E's In-Circuit Debugger software - ICD for Windows is a powerful tool for debugging . It uses the processor's background code debug mode, via an interface cable, to give the user direct access to all on-chip resources.
WinIDE allows you to run external programs including assemblers, C compilers, debuggers, and flash programmers from within one environment, with a single hot key for each. WinIDE comes optionally installed with a P&E assembler.
REGxx allows the user, via the BDM, to view and modify the processor's register fields in both symbolic and numeric format, which removes the tedious process of searching through manual pages for register descriptions. When the user selects a register, the actual processor's memory is read and displayed. The register files work with P&E's In-Circuit Debugger software.
A full 32 bit windows software package consisting of Integrated Development Environment, In Circuit Debugger, Assembler, Programmer, Register File is now available for all CPUs -- just add the cable of your choice.
P&E's package Pros provide all the engineer needs to start using the Gnu Cross Compiler. It has a version of the GNU/GCC compiler toolset precompiled by P&E to operate directly under the Windows environment without requiring the installation of a Unix shell. The compiler is integrated into WinIDE and allows for one-touch compilation of a C-level project. The package includes startup code and linker scripts for the most popular devices. The compiler produces both the Elf/Dwarf 2.0 and S19 output formats; The Elf/Dwarf format is loadable by P&E’s in-circuit debugger and the S19 is loadable by P&E’s in-circuit flash programmer all of which, along with a suitable BDM/JTAG interface, are included. The Pro versions of the package are now available for ColdFire and Power PC Qorivva 5xxx (AKA NEXUS).
A library of calls that allow the PC to directly drive the BDM cable. Ideal if you want to create your own production line test programs. For an example of the C and Pascal API follow this link. Two versions are available Windows and Linux x86 (not ARM).